| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce scale of a circuit with high utilization efficiency of circuits such as line memories and delay elements. <P>SOLUTION: A first stage filter 11 performs a filter calculation over a plurality of lines of image data, and a second stage filter 12 performs a filter calculation over a plurality of lines of image data on the subsequent stage of the filter 11. The setting circuit 50 assigns a part of a plurality of line memories 52 to the first stage filter 11, and another part of the plurality of line memories 52 to the second stage filter 12 in accordance with the number of lines of the filter calculation L1 of the first stage filter 11 and the number of lines of the filter calculation L2 of the second stage filter 12. <P>COPYRIGHT: (C)2012,JPO&INPIT |
