发明名称 WIRING PATTERN, MANUFACTURING METHOD OF THE SAME AND SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To thin an insulation layer covering a wiring pattern as much as possible. <P>SOLUTION: A wiring pattern 1 comprises first wiring 2 having a first pair of terminals 3, 4 and a plurality of first routing parts 5 connecting the first pair of terminals 3, 4, and second wiring 6 having a second pair of terminals 7, 8 and at least one second routing part 9 connecting the second pair of terminals 7, 8. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012164837(A) 申请公布日期 2012.08.30
申请号 JP20110024542 申请日期 2011.02.08
申请人 TERAMIKROS INC 发明人 ISHIWATARI SHINYA
分类号 H05K1/02;H01L21/3205;H01L21/768;H01L23/12;H01L23/522 主分类号 H05K1/02
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