| 摘要 |
<P>PROBLEM TO BE SOLVED: To achieve shortening of error correction processing time, reduction of power consumption and reduction of data for error correction. <P>SOLUTION: A memory controller comprises: a memory interface; and a control part for controlling the memory interface in accordance with a command from a host. The memory interface comprises: an error correction bit number setting part 161 for setting a first error correction bit number with i-bit to data in the case of binary writing into a memory, and for setting a second error correction bit number with j-bit (i<j) to the data in the case of multi-value writing; and an error correction code generation and addition part 162 for generating and adding a first error correction code with k-byte to the data when the first error correction bit number is set by the error correction bit number setting part, and for generating and adding a second error correction code with l-byte (k<l) to the data when the second error correction bit number is set. <P>COPYRIGHT: (C)2012,JPO&INPIT |
