| 摘要 |
A quadrature demodulator preweights an input signal prior to mixing with in-phase and quadrature clock signals. In an implementation with discrete phase rotation, a series of weighting circuits may be arranged before or after a select circuit to select the amount of phase rotation. Various implementations may include ratioed current mirrors to perform the weighting function, a stacked arrangement of mixers, an H-bridge input stage, integrated mixers and select circuits, and/or selectable gain stages such as gm cells to perform the weighting function. |
