SIGNAL DESKEW METHOD AND DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a clock tree with skew harmony under the presence of various processes of sophisticated automation (EDA) means designed by a computer by solving the problem in which clock skew causes deterioration in strict time yield in a super low voltage VDD digital circuit.

SOLUTION: A signal deskew device comprises: a phase comparator for receiving a reference signal and a local signal and detecting the phase difference by comparing the signals; a control circuit for switching on/off of a control signal in accordance with the value of the phase difference; and a local signal buffer. The local signal buffer includes an nMOS transistor and/or a pMOS transistor. Hot carrier injection stress is applied to the nMOS transistor or the pMOS transistor in response to the control signal to increase the threshold voltage of the nMOS transistor or the pMOS transistor.

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