| 摘要 |
<P>PROBLEM TO BE SOLVED: To shorten a delay time when generating an integral image. <P>SOLUTION: A computing unit 52 of an upright integral image generation circuit 41 calculates an integral value by summing up a current input luminance value R3, a stored value R2 of a register corresponding to a column of a current input pixel, in a column sum line buffer 50, and a stored value R1 of a register 51 each time the luminance value is input. A computing unit 65 of a rotary integral image generation circuit 42 finds an integral value (=K1+K2-K3+K4+K5) by subtracting a stored value K3 of a register, corresponding to a column of the input pixel, of an integral value line buffer 61 from the value obtained by summing up a stored value K1 of a register 64, a stored value K2 of a register, corresponding to a column one pixel on a maximum column side from the input pixel, of an integral value line buffer 60, a stored value K4 of a register, corresponding to the column of the input pixel, of a luminance value line buffer 62, and a current input luminance value K5 each time the input luminance value is input. <P>COPYRIGHT: (C)2012,JPO&INPIT |
