FIELD EFFECT TRANSISTOR, AND ELECTRIC CIRCUIT

摘要

#CMT# #/CMT# The FET (1) has a source electrode layer (2), a drain electrode layer (3), a semiconductor layer (5), an insulator layer (6) and a gate electrode layer (4). The gate electrode layer partially covers a channel , which is arranged between the source electrode layer and the drain electrode layer, when seen perpendicular to a plane of the source electrode layer and the drain electrode layer. The gate electrode layer is formed as a bottom gate electrode or as a top gate electrode. The channel extends between the source electrode layer and the drain electrode layer. #CMT# : #/CMT# Independent claims are also included for the following: (1) an electrical circuit (2) a method for manufacturing an electrical circuit. #CMT#USE : #/CMT# FET for use in a logic component such as inverter unit, NOR gate, NAND gate, AND gate and OR gate, of an electrical circuit (claimed). #CMT#ADVANTAGE : #/CMT# The FET is designed such that the FET is provided with a structured functional layer and enables reducing space requirement of an electrical circuit. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a cross sectional view of a FET, which is arranged on a carrier substrate. 1 : FET 2 : Source electrode layer 3 : Drain electrode layer 4 : Gate electrode layer 5 : Semiconductor layer 6 : Insulator layer 10 : Carrier substrate.