| 摘要 |
<p>[Object] To provide a parallel CAM that can perform the parity check fast at the search time. [Solution] The CAM 10 for searching all the addresses at the same time and determining whether or not the same data as input data is stored comprises a write search parity generator 12 for generating parities WP and SP of n-bit write and search data WD and SD, respectively, a plurality of memory locations 14 corresponding to a plurality of addresses, and a NAND circuit 16 for activating a parity error signal PE if at least one of valid parity match signals PMV outputted from the memory locations 14 is inactive. Each memory location 14 comprises n data memory cells 2, a parity memory cell 3, an exclusive OR circuit 20 for judging whether or not the parity SP and a parity RP are matched, and activating a parity match signal /PM, if they are matched, and a NAND circuit 22 for validating the parity match signal /PM using a data match signal DML.</p> |
