发明名称 Shader performance registers
摘要 One embodiment of a system for collecting performance data for a multithreaded processing unit includes a plurality of independent performance registers, each configured to count hardware-based and/or software-based events. Functional blocks within the multithreaded processing unit are configured to generate various event signals, and subsets of the events are selected and used to generate one or more functions, each of which increments one of the performance registers. By accessing the contents of the performance registers, a user may observe and characterize the behavior of the different functional blocks within the multithreaded processing unit when one or more threads are executed within the processing unit. The contents of the performance registers may also be used to modify the behavior of the program running on the multithreaded processing unit, to modify a global performance register or to trigger an interrupt.
申请公布号 US8253748(B1) 申请公布日期 2012.08.28
申请号 US20050290764 申请日期 2005.11.29
申请人 ALLEN ROGER L.;COON BRETT W.;NVIDIA CORPORATION 发明人 ALLEN ROGER L.;COON BRETT W.
分类号 G06F15/00 主分类号 G06F15/00
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