TIMING ANALYSIS SYSTEM OF SEMICONDUCTOR CHIP AND METHOD THEREOF

摘要

PURPOSE: A timing analysis system of a semiconductor chip and method thereof are provided to accurately predict a timing yield by accurately reflecting a phenomenon generated in silicon. CONSTITUTION: A net-list definition block(110) defines a net-list. A time delay definition block(160) defines the time delay of devices defined by the net-list. A time determination block(150) determines the time delay of a semiconductor chip by determining a p-value by executing a normalization test using the time delays. When the p-value is bigger than a predetermined value, the timing determination block determines the time delay of the semiconductor chip based on regular normalization.