发明名称 Information processing device that accesses memory, processor and memory management method
摘要 An information processing device of an example of the invention comprises an address generation section that generates a write address indicating a write position in a nonvolatile memory so that the write position is shifted in order to suppress each number of times of overlapped writing for each position of the nonvolatile memory when a write operation to the nonvolatile memory from a processor is performed, an order generation section that generates order information indicating a generation order of the writing operation, and a write control section that stores write information to the write address, and stores the order information to the nonvolatile memory so that the order information is related to at least one of the stored write information and the write address.
申请公布号 US8255614(B2) 申请公布日期 2012.08.28
申请号 US20090561924 申请日期 2009.09.17
申请人 OMIZO TAKASHI;KUNIMATSU ATSUSHI;KABUSHIKI KAISHA TOSHIBA 发明人 OMIZO TAKASHI;KUNIMATSU ATSUSHI
分类号 G06F12/00 主分类号 G06F12/00
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