| 摘要 |
In one embodiment, a method of generating simulation code of a circuit description having at least one module described in a combination of first and second HDLs is provided. The circuit description is elaborated (401) and a simulation dataflow graph of the circuit description is generated (430). The simulation dataflow graph is generated by modeling a datapath through modules of the first HDL using at least a first dataflow builder (412, 422), and modeling the datapath through modules of the second HDL using at least a second dataflow builder (410, 420). Simulation code, configured to model execution of the design according to the simulation dataflow graph, is generated (440) from the dataflow graph. |
