发明名称 Asymmetric Sense Amplifier Design
摘要 A circuit includes a first inverter including a first PMOS transistor and a first NMOS transistor, and a second inverter including a second PMOS transistor and a second NMOS transistor. A first node is connected to gates of the first PMOS transistor and the first NMOS transistor and drains of the second PMOS transistor and the second NMOS transistor. A second node is connected to gates of the second PMOS transistor and the second NMOS transistor and drains of the first PMOS transistor and the first NMOS transistor. The circuit further includes a first capacitor having a first capacitance connected to the first node; and a second capacitor having a second capacitance connected to the second node. The second capacitance is greater than the first capacitance.
申请公布号 US2012213010(A1) 申请公布日期 2012.08.23
申请号 US201113030722 申请日期 2011.02.18
申请人 WU CHING-WEI;CHEN KUANG TING;LEE CHENG HUNG;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WU CHING-WEI;CHEN KUANG TING;LEE CHENG HUNG
分类号 G11C7/10;G11C7/06;H01L25/00 主分类号 G11C7/10
代理机构 代理人
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