发明名称 SAMPLING CLOCK SYNCHRONIZATION DEVICE, DIGITAL COHERENT RECEPTION DEVICE, AND SAMPLING CLOCK SYNCHRONIZATION METHOD
摘要 <P>PROBLEM TO BE SOLVED: To improve a reception quality. <P>SOLUTION: A sampling clock synchronization device has an A/D converter, a filter part, and a sampling synchronization part. The A/D converter performs analog-to-digital conversion based on a sampling clock. The filter part, to a spectrum-constricted signal outputted from the A/D converter, compensates band restriction by the spectrum constriction by using filter characteristics that is inverse of the spectrum constriction characteristics. The sampling synchronization part detects a phase shift of a sampling clock from a signal after compensation of the spectrum constriction, and adjusts the phase of the sampling clock to synchronize a sampling timing. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012160888(A) 申请公布日期 2012.08.23
申请号 JP20110018847 申请日期 2011.01.31
申请人 FUJITSU LTD 发明人 NAKAJIMA HISAO;HOSHIDA GOJI
分类号 H04L7/02;H03M1/12;H04B10/07;H04B10/2507;H04B10/275;H04B10/278;H04B10/516;H04B10/556;H04B10/58;H04B10/61;H04J14/00;H04J14/02 主分类号 H04L7/02
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