发明名称 MEMORY DEVICE AND MEMORY SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a memory device and a memory system capable of writing data without reduction of data write speed regardless of the logical address of the data, and reducing power consumption. <P>SOLUTION: A memory controller 200 comprises: a logical-physical conversion table 204; an erased physical block management unit 206 that manages erased physical block addresses, non-volatile memories thereof, and each number of erased physical blocks per a non-volatile memory; an erasable physical block management unit 205 that manages erasable physical block addresses, non-volatile memories thereof, and each number of erasable physical blocks per a non-volatile memory; and a memory control unit 207. The memory control unit writes data on a first physical block in one non-volatile memory that is under the management of the erased physical block management unit, and erases, in parallel therewith, a second physical block in another non-volatile memory that is under the management of the erasable physical block management unit. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012159993(A) 申请公布日期 2012.08.23
申请号 JP20110018909 申请日期 2011.01.31
申请人 SONY CORP 发明人 KOSHIYAMA JUNICHI;KONNO TAMAKI;NAKAJIMA DAISUKE;NISHIURA TOSHIFUMI
分类号 G06F12/06;G06F12/00 主分类号 G06F12/06
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