摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock buffer circuit that is compliant with a wideband of clock signals in a small circuit scale. <P>SOLUTION: A clock buffer circuit 100 of an embodiment includes a driver section 11 and an LC tank section 21. The driver section 11 outputs at least non-inverted outputs of input clock signals from clock inputs IN, INB to clock outputs OUT, OUTB, respectively. The LC tank section is disposed between the driver section 11 and the clock outputs OUT, OUTB. The driver section 11 has switches SW1, SW2 for short-circuiting the inputs and outputs of the driver section 11 in response to control signals corresponding to frequencies of the input clock signals. <P>COPYRIGHT: (C)2012,JPO&INPIT |