发明名称 Pipelining hardware accelerators to computer systems
摘要 A method of pipelining hardware accelerators of a computing system includes associating hardware addresses to at least one processing unit (PU) or at least one logical partition (LPAR) of the computing system, receiving a work request for an associated hardware accelerator address, and queuing the work request for a hardware accelerator using the associated hardware accelerator address.
申请公布号 US8250578(B2) 申请公布日期 2012.08.21
申请号 US20080035511 申请日期 2008.02.22
申请人 KRISHNAMURTHY RAJARAM B.;GREGG THOMAS A.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KRISHNAMURTHY RAJARAM B.;GREGG THOMAS A.
分类号 G06F13/00;G06F3/00;G06F9/26;G06F9/44;G06F9/45;G06F13/36;G06F15/76 主分类号 G06F13/00
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