发明名称 Cache coherency protocol with built in avoidance for conflicting responses
摘要 The method includes initiating a processor request to a cache in a requesting node and broadcasting the processor request to remote nodes when the processor request encounters a local cache miss, performing a directory search of each remote cache to determine a state of a target line's address and an ownership state of a specified address, returning the state of the target line to the requesting node and forming a combined response, and broadcasting the combined response to each remote node. During a fetch operation, when the directory search indicates an IM or a Target Memory node on a remote node, data is sourced from the respective remote cache and forwarded to the requesting node while protecting the data, and during a store operation, the data is sourced from the requesting node and protected while being forwarded to the IM or the Target Memory node after coherency has been established.
申请公布号 US8250308(B2) 申请公布日期 2012.08.21
申请号 US20080031977 申请日期 2008.02.15
申请人 PAPAZOVA VESSELINA K.;AMBROLADZE EKATERINA M.;BLAKE MICHAEL A.;MAK PAK-KIN;O'NEILL, JR. ARTHUR J.;WATERS CRAIG R.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 PAPAZOVA VESSELINA K.;AMBROLADZE EKATERINA M.;BLAKE MICHAEL A.;MAK PAK-KIN;O'NEILL, JR. ARTHUR J.;WATERS CRAIG R.
分类号 G06F12/00 主分类号 G06F12/00
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