发明名称 TRACKING SCHEME FOR MEMORY
摘要 A memory has a tracking circuit for a read tracking operation. The memory includes a memory bit cell array, a tracking column, a tracking row, a sense amplifier row coupled to the memory bit cell array and the tracking row, and a sense amplifier enable logic. The memory further includes a tracking bit line coupled to the tracking column and the sense amplifier enable logic, and a tracking word line coupled to the tracking row and the sense amplifier enable logic. The tracking circuit is configured to track a column time delay along the tracking column before a row time delay along the tracking row.
申请公布号 US2012206983(A1) 申请公布日期 2012.08.16
申请号 US201113026021 申请日期 2011.02.11
申请人 ZHANG YONG;TAO DEREK C.;JEONG DONGSIK;KIM YOUNG SUK;HSU KUOYUAN (PETER);TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 ZHANG YONG;TAO DEREK C.;JEONG DONGSIK;KIM YOUNG SUK;HSU KUOYUAN (PETER)
分类号 G11C7/06;G11C7/00 主分类号 G11C7/06
代理机构 代理人
主权项
地址