发明名称 Circuit and Method of a Memory Compiler Based on Subtraction Approach
摘要 A memory compiler to generate a set of memories is based on a subtraction approach from a set of templates (memory templates), including at least one layout database and auxiliary design databases, by software. The software can be based on general-purpose programming language or a layout-specific language. The compiled memories can be generated by reducing the memory array sizes in row and/or column directions by moving, deleting, adding, sizing, or stretching the layout objects, and disabling the high order addresses, etc. from the memory template by software. The new auxiliary design databases, such as layout phantom, behavior model, synthesis view, placement-and-routing view or datasheet, can also be generated by modifying some parameters from the memory template by software. One-time programmable memory using junction diode, polysilicon diode, or isolated active-region diode as program selector in a cell can be generated accordingly.
申请公布号 US2012209888(A1) 申请公布日期 2012.08.16
申请号 US201213397673 申请日期 2012.02.15
申请人 CHUNG SHINE C. 发明人 CHUNG SHINE C.
分类号 G06F7/00 主分类号 G06F7/00
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