发明名称 OPERATIONAL AMPLIFICATION CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To improve a settling speed. <P>SOLUTION: An operational amplification circuit comprises: a differential pair (M1, M2, M19) for amplifying a differential input signal; a pair of two cascode amplifiers (M9, M10) connected to one output end and the other of the differential pair, respectively; and a first, source-grounded MOS transistor pair (M11a, M12a) having respective gates connected to one output end and the other of the cascode amplifier pair and respective drains connected to the one output end and the other of the differential pair, and further comprises a second, source-grounded MOS transistor pair (M3a, M4a) of the same conductivity type as that of the first MOS transistor pair having respective gates connected to the one output end and the other of the cascode amplifier pair and respective drains connected to the other output end and the one of the differential pair. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012156611(A) 申请公布日期 2012.08.16
申请号 JP20110011536 申请日期 2011.01.24
申请人 RENESAS ELECTRONICS CORP 发明人 ETO TOSHIYUKI
分类号 H03F3/45 主分类号 H03F3/45
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