发明名称 INFORMATION PROCESSOR AND WRITING CONTROL METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide an information processor for suppressing data writing frequency to a flash device. <P>SOLUTION: An information processor includes: a first memory having a plurality of management areas to be managed for every first memory capacity by an operating system; a second memory in which data are written for every second memory capacity which is larger than the first memory capacity; selection means for selecting one management area from among the plurality of management areas of the first memory; and writing means for writing the data of the management areas whose number corresponds to the second memory capacities including the data of the selected management area and the data of the management area which is different from the selected management area in the second memory. The writing means writes the data of the first management area selected by the selection means and the data of the management area which is different from the pertinent first management area in the second memory, and when any one second management area is selected from among the different management areas by the selection means, the writing means does not write the data of the pertinent second management area in the second memory. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012155561(A) 申请公布日期 2012.08.16
申请号 JP20110014607 申请日期 2011.01.26
申请人 TOSHIBA CORP 发明人 UETOKO KATSUKI
分类号 G06F12/12;G06F12/00 主分类号 G06F12/12
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