发明名称 |
Method of forming a vertical diode and method of manufacturing a semiconductor device using the same |
摘要 |
A method of forming a vertical diode and a method of manufacturing a semiconductor device (e.g., a semiconductor memory device such as a phase-change memory device) includes forming an insulating structure having an opening on a substrate and filling the opening with an amorphous silicon layer. A metal silicide layer is formed to contact at least a portion of the amorphous silicon layer and a polysilicon layer is then formed in the opening by crystallizing the amorphous silicon layer using the metal silicide layer. A doped polysilicon layer is formed by implanting impurities into the polysilicon layer. Thus, the polysilicon layer is formed in the opening without performing a selective epitaxial growth (SEG) process, so that electrical characteristics of the diode may be improved. |
申请公布号 |
US8241979(B2) |
申请公布日期 |
2012.08.14 |
申请号 |
US20100805825 |
申请日期 |
2010.08.20 |
申请人 |
PARK SANG-JIN;LEE KONG-SOO;HYUNG YONG-WOO;YOU YOUNG-SUB;HAN JAE-JONG;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK SANG-JIN;LEE KONG-SOO;HYUNG YONG-WOO;YOU YOUNG-SUB;HAN JAE-JONG |
分类号 |
H01L21/8234 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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