| 摘要 |
<p>The present invention has: a component element (4) obtained by laminating a plurality of semiconductor ceramic layers (1a-1g), which are formed from a semiconductor ceramic that is SrTiO3-based grain boundary insulating, and a plurality of internal electrode layers (2a-2f), which have Ni as the primary component, in an alternating manner and sintering; and external electrodes (3a, 3b) that are electrically connected to the internal electrode layers (2a-2f) at both ends of the component element (4). The thicknesses of the semiconductor ceramic layers (1b-1f) excluding the outer cladding semiconductor ceramic layers (1a, 1g) are at least 20 µm, and the average grain size of the crystal grains in the semiconductor ceramic layers (1a-1g) is no greater than 1.5 µm. When analyzing the central section or the vicinity of the central section in the direction of lamination of the semiconductor ceramic layers via a WDX method, the ratio (x/y) of the strength (x) of the element Ni to the strength (y) of the element Ti is no greater than 0.06. As a result, a laminate semiconductor ceramic capacitor having varistor functionality is achieved that has favorable reliability, is able to stably obtain favorable electrical characteristics and insulating properties, and has low unevenness in characteristics between products.</p> |
