| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a high speed current steering DAC that can generate a high output/amplitude analog signal while balancing output linearity and low power consumption. <P>SOLUTION: The DAC includes D-FFs 1<SB POS="POST">D0</SB>-1<SB POS="POST">D5</SB>, switches 3<SB POS="POST">D0</SB>-3<SB POS="POST">D5</SB>, current sources 11<SB POS="POST">D0</SB>-11<SB POS="POST">D5</SB>, and an R-2R resistance ladder 12. In the current sources 11<SB POS="POST">D0</SB>-11<SB POS="POST">D5</SB>, current values of the current sources 11<SB POS="POST">D0</SB>-11<SB POS="POST">D3</SB>corresponding to the lower four bits are weighted according to the corresponding bits relative to a current value I of the current sources 11<SB POS="POST">D4</SB>, 11<SB POS="POST">D5</SB>corresponding to the higher two bits. Output terminals 12b, 12c of the R-2R resistance ladder 12 are connected to input terminals of the switches 3<SB POS="POST">D4</SB>, 3<SB POS="POST">D5</SB>corresponding to the respective bits, and further the output terminal 12b is connected to an analog output terminal and the output terminal 12c is connected to input terminals of the switches 3<SB POS="POST">D0</SB>-3<SB POS="POST">D3</SB>corresponding to the lower four bits. <P>COPYRIGHT: (C)2012,JPO&INPIT |
