发明名称 POWER ESTIMATION IN AN INTEGRATED CIRCUIT DESIGN FLOW
摘要 Power estimates for an integrated circuit may be obtained without having to individually enter monitor statements at hierarchical levels in a design. The current, or consumed power may be considered at the transistor level throughout the entire circuit, even when the circuit is divided into hierarchical modules. Current, or power measurements may be obtained after a circuit has been synthesized and an extracted transistor-level netlist has been created. Separate netlists may be created for different modules, and estimate results collected from the different modules, since current measurements are performed at the transistor level. To accurately estimate the power consumption, the current flowing through transistors that are connected to power rails in the netlist may be measured during circuit simulation. This may be accomplished via measurement statements created for these transistors, and placed in a simulation input file, by a script or program, for example. Only the currents flowing through these transistors need to be measured to account for all the current provided from the power sources in the design.
申请公布号 US2012203480(A1) 申请公布日期 2012.08.09
申请号 US201113183335 申请日期 2011.07.14
申请人 FRERICH JASON A.;GOERTZ CHRISTOPHER M.;MCCOMBS EDWARD M. 发明人 FRERICH JASON A.;GOERTZ CHRISTOPHER M.;MCCOMBS EDWARD M.
分类号 G06F19/00 主分类号 G06F19/00
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