发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR CHIP AND METHOD OF DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 A semiconductor integrated circuit includes a delay circuit connected between a source of data bits and a data input terminal of a latch circuit. The delay circuit includes a first delay section formed by connecting logic devices in series corresponding to a number of logic devices included in a clock signal path between a clock signal source and the latch circuit data input. The delay circuit also includes a second delay section having a delay time equal to an interconnect delay time corresponding to a wiring length of the clock signal path.
申请公布号 US2012200330(A1) 申请公布日期 2012.08.09
申请号 US201213362414 申请日期 2012.01.31
申请人 KAWAGOE MASAKUNI;LAPIS SEMICONDUCTOR CO., LTD. 发明人 KAWAGOE MASAKUNI
分类号 H03L7/00;G06F17/50 主分类号 H03L7/00
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