摘要 |
<p>An integrated circuit device (105) comprises at least one digital signal processor, DSP, module (100), the at least one DSP module (100) comprising a plurality of data registers (140) and at least one data execution unit, DEU, module (120) arranged to execute operations on data stored within the data registers (140). The at least one DEU module (120) is arranged to, in response to receiving an extreme value index instruction (210), compare a previous extreme value (425) located within a first data register set (220, 230) of the DSP module (100) with at least one input vector data value (440, 445, 450, 455) located within a second data register set (240, 250) of the DSP module (100), and determine an extreme value thereof. The at least one DEU module (120) is further arranged to, if the determined extreme value comprises an input vector data value (440, 445, 450, 455) located within the second data register set (240, 250), store the determined extreme value in the first data register set (220, 230), determine an index value for the determined extreme value, and store the determined index value in the first data register set (220, 230).</p> |
申请人 |
FREESCALE SEMICONDUCTOR, INC.;MOSKOVICH, ILIA;AMIR, AVIRAM;BARAK, ITZHAK;BEN ZEEV, ELIEZER |
发明人 |
MOSKOVICH, ILIA;AMIR, AVIRAM;BARAK, ITZHAK;BEN ZEEV, ELIEZER |