发明名称 HETEROJUNCTION BIPOLAR TRANSISTOR
摘要 <P>PROBLEM TO BE SOLVED: To effectively reduce an on-voltage of a heterojunction bipolar transistor without degrading other element performances such as current gain and current gain cutoff frequency. <P>SOLUTION: A sub-collector layer 102, a collector layer 103, a base layer 104, a first emitter layer 105, a second emitter layer 106, and a cap layer 107 are sequentially stacked on a substrate 101. The second emitter layer 106 is formed from a semiconductor material that is selectively removed by wet etching with respect to the first emitter layer 105, and a semiconductor constituting the second emitter layer 106 is degenerated by an addition of an impurity. Additionally, the first emitter layer 105 of the HBT includes a first semiconductor layer 151 that is disposed at the base layer 104 side and to which an impurity is added; and a second semiconductor layer 152 that is disposed in contact with the first semiconductor layer 151 at the second emitter layer 106 side and to which the impurity is not added. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012151340(A) 申请公布日期 2012.08.09
申请号 JP20110009732 申请日期 2011.01.20
申请人 NIPPON TELEGR & TELEPH CORP <NTT> 发明人 KURISHIMA KENJI;IDA MINORU
分类号 H01L29/737;H01L21/331 主分类号 H01L29/737
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