| 摘要 |
<P>PROBLEM TO BE SOLVED: To recode a floating-point multiply instruction to a floating-point multiply-add instruction. <P>SOLUTION: In a denormal support mode, a normalization circuit of a floating-point adder is used to normalize or denormalize output of a floating-point multiplier. Each floating-point multiply instruction is speculatively converted to a multiply-add instruction, with the addend forced to zero. This preserves the value of the product, while normalizing or denormalizing the product using the floating-point adder's normalization circuit. When the operands to the multiply operation are available, they are inspected. If the operands will not generate an unnormal intermediate product or a denormal final product, the add operation is suppressed, such as by operand-forwarding. Additionally, each non-fused floating-point multiply-add instruction is replaced with a multiply-add instruction having a zero addend, and a floating-point add instruction having the addend of the original multiply-add instruction is inserted into the instruction stream. <P>COPYRIGHT: (C)2012,JPO&INPIT |
