发明名称 Reduced pattern loading using bis(diethylamino)silane (C8H22N2Si) as silicon precursor
摘要 Aspects of the disclosure pertain to methods of depositing dielectric layers on patterned substrates. In embodiments, dielectric layers are deposited by flowing BIS(DIETHYLAMINO)SILANE (BDEAS), ozone and molecular oxygen into a processing chamber such that a relatively uniform dielectric growth rate is achieved across the patterned substrate surface. The deposition of dielectric layers grown according to embodiments may have a reduced dependence on pattern density while still being suitable for non-sacrificial applications.
申请公布号 US8236708(B2) 申请公布日期 2012.08.07
申请号 US20100855877 申请日期 2010.08.13
申请人 KWESKIN SASHA;GEE PAUL EDWARD;VENKATARAMAN SHANKAR;SAPRE KEDAR;APPLIED MATERIALS, INC. 发明人 KWESKIN SASHA;GEE PAUL EDWARD;VENKATARAMAN SHANKAR;SAPRE KEDAR
分类号 H01L21/316;C23C16/40 主分类号 H01L21/316
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