发明名称 |
Planar silicide semiconductor structure |
摘要 |
A planar silicide structure and method of fabrication is disclosed. A FET having a silicided raised source-drain structure is formed where the height of the source-drain structures are the same as the height of the gates, simplifying the process of forming contacts on the FET. One embodiment utilizes a replacement metal gate FET and another embodiment utilizes a gate-first FET. |
申请公布号 |
US8236637(B2) |
申请公布日期 |
2012.08.07 |
申请号 |
US20100893245 |
申请日期 |
2010.09.29 |
申请人 |
UTOMO HENRY K.;JAIN SAMEER HEMCHAND;RAMACHANDRAN RAVIKUMAR;TRAN CUNG D.;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
UTOMO HENRY K.;JAIN SAMEER HEMCHAND;RAMACHANDRAN RAVIKUMAR;TRAN CUNG D. |
分类号 |
H01L21/8238 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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