发明名称 Data processing circuit and data processing method
摘要 A data processing circuit comprising: a first circuit configured to time-division-multiplex a first digital signal synchronous with a clock signal input from an external controller and a second digital signal asynchronous with the clock signal; and a second circuit configured to output a digital signal time-division-multiplexed by the first circuit to the controller.
申请公布号 US8238385(B2) 申请公布日期 2012.08.07
申请号 US20070778947 申请日期 2007.07.17
申请人 ARAI HIROYUKI;TOKUNAGA TETSUYA;OSAWA YASUO;GOTO KENSUKE;YAMAGATA YOSHIYUKI;KIMURA TAKESHI;SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC;SANYO SEMICONDUCTOR CO., LTD. 发明人 ARAI HIROYUKI;TOKUNAGA TETSUYA;OSAWA YASUO;GOTO KENSUKE;YAMAGATA YOSHIYUKI;KIMURA TAKESHI
分类号 H04J3/04 主分类号 H04J3/04
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