发明名称 Semiconductor memory device, memory module including the same, and data processing system
摘要 To provide a semiconductor device including a skew detecting circuit activated in a write leveling mode, and an ODT control circuit that activates a terminating resistance circuit connected to a data strobe terminal by using an ODT signal. The ODT control circuit includes counters that delay the ODT signal, activates the terminating resistance circuit by using the ODT signal having passed the counters in a normal operation mode, and activates the terminating resistance circuit by using the ODT signal having bypassed the counters in the write leveling mode. With this configuration, in the write leveling mode, a write leveling operation can be performed quickly without waiting for latency of the ODT signal.
申请公布号 US8238175(B2) 申请公布日期 2012.08.07
申请号 US20100706415 申请日期 2010.02.16
申请人 FUJISAWA HIROKI;ELPIDA MEMORY, INC. 发明人 FUJISAWA HIROKI
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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