发明名称 |
Nonvolatile memory devices that utilize error correction estimates to increase reliability of error detection and correction operations |
摘要 |
Example embodiments may provide a memory device and memory data reading method. The memory device according to example embodiments may include a multi-bit cell array, an error detector which may read a first data page from a memory page in the multi-bit cell array and may detect an error-bit of the first data page, and an estimator which may identify a multi-bit cell where the error-bit is stored and may estimate data stored in the identified multi-bit cell among data of a second data page. Therefore, the memory device and memory data reading method may have an effect of reducing an error when reading data stored in the multi-bit cell and monitoring a state of the multi-bit cell without additional overhead. |
申请公布号 |
US8239747(B2) |
申请公布日期 |
2012.08.07 |
申请号 |
US20080216744 |
申请日期 |
2008.07.10 |
申请人 |
CHO KYOUNG LAE;KIM JAE HONG;PARK YOON DONG;KONG JUN JIN;CHAE DONG HYUK;SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
CHO KYOUNG LAE;KIM JAE HONG;PARK YOON DONG;KONG JUN JIN;CHAE DONG HYUK |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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