发明名称 System on chip (SoC) device verification system using memory interface
摘要 A system on a chip (SoC) device verification system comprises: an SoC device model including one or more IPs and a memory controller; an external IP verification model receiving an instruction from the SoC device model and verifying operation of the one or more IPs included in the SoC device model; and a bus select model selecting one of the external IP verification model and an external device in response to a memory control signal received from the memory controller of the SoC device model.
申请公布号 US8239708(B2) 申请公布日期 2012.08.07
申请号 US20090455207 申请日期 2009.05.29
申请人 PARK JIN-KWON;LEE CHEON-SU;LEE JAE-SHIN;LEE MIN-JOUNG;SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK JIN-KWON;LEE CHEON-SU;LEE JAE-SHIN;LEE MIN-JOUNG
分类号 G06F11/26 主分类号 G06F11/26
代理机构 代理人
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