发明名称 Data processing system
摘要 Before arbitration is performed in an arbitration section, an access from a master is kept in a waiting state until update of a conversion table buffer is performed, and an address conversion section is provided in a subsequent stage of the arbitration section. Without waiting for the completion of buffer update, an access is issued in advance at a time when it is assured that update is completed at the completion of address conversion. Thus, influences of waiting buffer update on another master can be eliminated and access latency can be reduced.
申请公布号 US8239652(B2) 申请公布日期 2012.08.07
申请号 US20080109894 申请日期 2008.04.25
申请人 SOGA YUKI;KAWAMOTO ISAO;MURAKAMI DAISUKE;PANASONIC CORPORATION 发明人 SOGA YUKI;KAWAMOTO ISAO;MURAKAMI DAISUKE
分类号 G06F13/00;G06F9/26;G06F9/34;G06F12/00 主分类号 G06F13/00
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