发明名称 AREA EFFICIENT ARRANGEMENT OF INTERFACE DEVICE WITHIN INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a system with an increased number of input/output devices while not unduly increasing skew into the system. <P>SOLUTION: An integrated circuit is disclosed that comprises: a core comprising logic circuitry; a plurality of interface devices for transmitting signals to and from the processing core, the plurality of interface devices comprising two types of interface devices; one type being a power interface device for delivering power to the core; and a second type being a signal interface device for transmitting data signals between the core and devices external to the integrated circuit. The plurality of interface devices is arranged in two rows, an outer row towards an outer edge of the core and an inner row within the outer row closer to a center of the core, the inner row comprising one of the two types of interface devices and the outer row comprising the other of the two types of interface devices. <P>COPYRIGHT: (C)2012,JPO&INPIT
申请公布号 JP2012146979(A) 申请公布日期 2012.08.02
申请号 JP20120001130 申请日期 2012.01.06
申请人 ARM LTD 发明人 VIKAS MISHRA;WANG BINGDA BRANDON
分类号 H01L27/04;H01L21/82;H01L21/822 主分类号 H01L27/04
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