| 摘要 |
According to one embodiment, a semiconductor integrated circuit includes an input register which latches, by a second unit, data which are read from a memory cell array by a first unit, a bit state-counter which counts a bit state of the data latched in the input register, a frame size-setup register which latches the first unit, an input data-counter which detects whether or not a total number of the data input to the input register reaches to the first unit, an accumulation circuit which accumulate a value counted by the bit state-counter, a threshold value-register which latches a threshold value for detecting whether or not an erase area of the memory cell array is accessed, a comparison circuit which compares an accumulated value of the accumulation circuit and the threshold value with each other, and a product storage-register which latches a result of the comparison circuit.
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