发明名称 MOS TRANSISTOR AND FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 A high-voltage MOS transistor has a semiconductor substrate formed with a first well of a first conductivity type in which a drain region and a drift region are formed and a second well of a second, opposite conductivity type in which a source region and a channel region are formed, a gate electrode extends over the substrate from the second well to the first well via a gate insulation film, wherein there is formed a buried insulation film in the drift region underneath the gate insulation film at a drain edge of the gate electrode, there being formed an offset region in the semiconductor substrate between the channel region and the buried insulation film, wherein the resistance of the offset region is reduced in a surface part thereof by being introduced with an impurity element of the first conductivity type with a concentration exceeding the first well.
申请公布号 US2012193709(A1) 申请公布日期 2012.08.02
申请号 US201113293252 申请日期 2011.11.10
申请人 SUKEGAWA TAKAE;MOMIYAMA YOUICHI;FUJITSU SEMICONDUCTOR LIMITED 发明人 SUKEGAWA TAKAE;MOMIYAMA YOUICHI
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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