发明名称 |
SAMPLING CLOCK SYNCHRONIZING APPARATUS, DIGITAL COHERENT RECEIVING APPARATUS, AND SAMPLING CLOCK SYNCHRONIZING METHOD |
摘要 |
In a sampling clock synchronizing apparatus, an A/D converter converts an analog signal to a digital signal based on a sampling clock, and a processor compensates a band limitation due to spectral narrowing by filter characteristics of characteristics opposite to those of the spectral narrowing with respect to a signal produced from the A/D converter subjected to the spectral narrowing, and detects a phase shift in the sampling clock based on a signal after the compensation of the spectral narrowing and synchronizes sampling timing.
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申请公布号 |
US2012195602(A1) |
申请公布日期 |
2012.08.02 |
申请号 |
US201213345008 |
申请日期 |
2012.01.06 |
申请人 |
NAKASHIMA HISAO;HOSHIDA TAKESHI;FUJITSU LIMITED |
发明人 |
NAKASHIMA HISAO;HOSHIDA TAKESHI |
分类号 |
H04L7/02;H04B10/06 |
主分类号 |
H04L7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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