| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a signal processing circuit capable of continuous signal processing even when a programmable circuit block performing signal processing is faulty. <P>SOLUTION: When an output confirmation circuit 6 determines that a first FPGA 2 is faulty after configuration of a first function of the first FPGA 2, a control circuit 5 configures the first function to a substitute FPGA 3. After confirming that the configuration is normally complete, the control circuit controls a selection circuit 4 to selectively output an output signal of the substitute FPGA 3. <P>COPYRIGHT: (C)2012,JPO&INPIT |
