发明名称 A multi-threaded processor
摘要 Systems and methods for predicting out-of-order instruction-level parallelism (ILP) of threads being executed in a multi-threaded processor and prioritizing scheduling thereof are described herein. One aspect provides for tracking completion of instructions using a global completion table having a head segment and a tail segment; storing prediction values for each instruction in a prediction table indexed via instruction identifiers associated with each instruction, a prediction value being configured to indicate an instruction is predicted to issue from one of: the head segment and the tail segment; and predicting threads with more instructions issuing from the tail segment have a higher degree of out-of-order instruction-level parallelism. Other embodiments and aspects are also described herein.
申请公布号 GB201210975(D0) 申请公布日期 2012.08.01
申请号 GB20120010975 申请日期 2012.06.21
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人
分类号 主分类号
代理机构 代理人
主权项
地址