发明名称 DEVICE ALLOWING SUPPRESSION OF STRESS ON CHIP
摘要 A device includes: a first substrate including a plurality of first electrodes; a plurality of chips each including a plurality of through electrodes, the chips being stacked with each other such that the through electrodes of a lower one of the chips are connected respectively the through electrodes of an upper one of the chips to provide a chip stacked body; and a second substrate cooperating the first substrate to sandwich the chip stacked body between the first and second substrates, the second substrate including a plurality of second electrodes on a first surface that is opposite to a second surface facing the chip stacked body, each of the second electrodes being electrically connected to an associated one of the through electrodes of an uppermost one of the chips of the chip stacked body.
申请公布号 US2012187401(A1) 申请公布日期 2012.07.26
申请号 US201213353874 申请日期 2012.01.19
申请人 WAKI TOSHIHIRO;ISHIKAWA TORU;ELPIDA MEMORY, INC. 发明人 WAKI TOSHIHIRO;ISHIKAWA TORU
分类号 H01L23/538 主分类号 H01L23/538
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