| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which suppresses erroneous writing caused by power shutdown and has high reliability. <P>SOLUTION: The semiconductor memory device includes: a plurality of memory cells connected to a word line and a bit line; a low-speed detection circuit 41 which detects whether or not an external power source VEXT is a first predetermined voltage or more and outputs a flag signal FLGS; a high-speed detection circuit 42 which detects whether or not the external power source is the first predetermined voltage more quickly than the low-speed detection circuit 41 and outputs a flag signal FLGF; a switching circuit which outputs the flag signal FLGF to be output from the high-speed detection circuit 42 in a writing operation of applying a writing voltage to the word line, and outputs the flag signal FLGS to be output from the low-speed detection circuit 41 in operations other than the writing operation; and a recovery control circuit which finishes the writing operation according to the flag signal FLGF to be output from the switching circuit. <P>COPYRIGHT: (C)2012,JPO&INPIT |
