发明名称 Process for Improving Copper Line Cap Formation
摘要 An integrated circuit includes a semiconductor substrate, a low-k dielectric layer over the semiconductor substrate, a first opening in the low-k dielectric layer, and a first diffusion barrier layer in the first opening covering the low-k dielectric layer in the first opening, wherein the first diffusion barrier layer has a bottom portion connected to sidewall portions, and wherein the sidewall portions have top surfaces close to a top surface of the low-k dielectric layer. The integrated circuit further includes a conductive line filling the first opening wherein the conductive line has a top surface lower than the top surfaces of the sidewall portions of the diffusion barrier layer, and a metal cap on the conductive line and only within a region directly over the conductive line.
申请公布号 US2012190191(A1) 申请公布日期 2012.07.26
申请号 US201213440704 申请日期 2012.04.05
申请人 SHIH CHIEN-HSUEH;TSAI MINGHSING;YU CHEN-HUA;YEH MING-SHIH;TAIWAN SEMICONDUCTOR MANUFATURING COMPANY, LTD. 发明人 SHIH CHIEN-HSUEH;TSAI MINGHSING;YU CHEN-HUA;YEH MING-SHIH
分类号 H01L21/768 主分类号 H01L21/768
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