| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a PLL circuit that can shorten a time from a power startup to a lock and quickly discharge electrical charges at a power shutdown. <P>SOLUTION: In the PLL circuit, a detector 11 detects a phase lead/lag, an integrator 12 integrates a signal corresponding to the phase lead/lag, a starting pulse generation section 13 detects a power startup and outputs a pulse having a pulse width based on a time to a lock to an LPF 5 and the integrator 12, and the LPF 5 and the integrator 12 charge internal capacitors by the pulse from the starting pulse generation section 13, and discharges electrical charges stored in the internal capacitors at a power shutdown. <P>COPYRIGHT: (C)2012,JPO&INPIT |
