LIQUID CRYSTAL DISPLAY DEVICE EQUIPPED WITH MEMORY DEVICE

摘要

A transistor (N1) has (i) a gate terminal which is connected to a word line (Xi(1)) and (ii) a first conduction terminal which is connected to a bit line (Yj). A transistor (N2) has (i) a gate terminal which is connected to the word line (Xi(2)) and (ii) a first conduction terminal which is connected to a node (PIX). A transistor (N3) has (i) a gate terminal which is connected to a node (MRY) and (ii) a first conduction terminal which is connected to the word line (Xi(2)). A transistor (N4) has (i) a gate terminal which is connected to the word line (Xi(3)), (ii) a first conduction terminal which is connected to a second conduction terminal of the transistor (N3), and (iii) a second conduction terminal which is connected to the node (PIX). A capacitor (Ca1) is formed between the node (PIX) and a reference electric potential wire (RL1), a capacitor (Cb1) is formed between the node (MRY) and the reference electric potential wire (RL1), and a capacitor (Cap1) is formed between the first conduction terminal of the transistor (N3) and the node (MRY). In a memory device which carries out a refresh operation in a data retention period following writing of a data signal electric potential, power consumption is reduced and the refresh operation is properly carried out.