发明名称 DIGITAL TO ANALOG CONVERTER SYSTEM AND METHOD WITH MULTI-LEVEL SCRAMBLING
摘要 <p>Tri-level scrambling in a digital to analog converter system is achieved by, in response to a tri-level binary code input, disabling a negative data directed scrambler circuit when the input code is in the positive cycle portion, disabling a positive data directed scrambler circuit when the input code is in the negative cycle portion and disabling both scrambler circuits upon a zero input code for reducing low level distortion due to a reversal of current during crossover between those cycles.</p>
申请公布号 EP2478639(A2) 申请公布日期 2012.07.25
申请号 EP20100819128 申请日期 2010.09.22
申请人 MEDIATEK SINGAPORE PTE LTD. 发明人 O'DONNELL, JOHN JUDE;THOMPSON, FREDERICK CARNEGIE
分类号 H03M1/06;H03M1/74;H03M3/04;H04L25/03 主分类号 H03M1/06
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