Processor reliability improvement using automatic hardware disablement

摘要

Techniques are provided herein to dynamically disable a hardware component in a processor device. Notifications for single-bit errors detected in a hardware component are received. The hardware component is disabled for a period of time when a number of single-bit errors exceeds a threshold. In addition, techniques are provided to permanently disable one or more hardware components in order to minimize the number of system malfunctions associated with single event upsets (SEUs).